An EDN Design Idea (DI) presented a discussion of how to increase the resolution of an ADC by adding a non-deterministic, zero-mean, Gaussian noise dither waveform to a signal to be converted; then, oversampling the sums, and low-pass filtering (thereby averaging) the ADC conversions. (As noted, a filter that optimally removes out-of-band high-frequency dither noise is generally more complex than a simple averager.)
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Conversions are executed at a rate of M times that are required to satisfy the Nyquist condition. Low-pass filtering them offers an increase in resolution of a factor of M and of B = log2(M) bits.
The signal at the filter output has negligible energy above the Nyquist frequency, and so only every Mth output of the filter needs to be sampled in a process known as decimation. Even though the resolution of the conversions has been increased by a factor of M, the signal-to-quantization noise ratio has not improved by the same amount. Because there is still non-deterministic noise present below the Nyquist frequency, it turns out that the signal-to-quantization noise ratio has improved only by a factor of sqrt(M) and by sqrt(B) bits.
Avoiding dither-associated noise
But what if the signal were DC and the dither were known, deterministic, and repeated every M samples? The addition of dither-associated noise could be avoided if a judiciously selected dither waveform were added to the signal to be converted and its mean subtracted from the average of M conversions. A simple averager would suffice for the filter. (And if the dither were zero-mean, there would be nothing to subtract!) The advantage of this approach would be that the signal-to-quantization noise ratio would be improved by the same amount as the resolution.
So, what might constitute a “judiciously selected” dither waveform? I won’t keep you in suspense: a sawtooth whose peak-to-peak amplitude is an odd integral multiple of the size of the least significant bit (LSB) of the ADC fits the bill. Why only “odd”? Let’s see why the odds work and why the evens are not as good choices.
Examining the effects of dithering
In examining the effects of dithering, it’s convenient to work with integer values. For example, let’s assign the smallest possible ADC conversion step size value not to 1 as is traditional, but to M, which is also the number of conversions to be averaged to produce an output. Consider the case of M equal to 64.
Accordingly, all ADC conversions are integral multiples of M: 0, 64, 128, etc., whereas the dither ramp takes on the values of d = 0, 1, 2… 63. Each dither value is added to an input value of (for example) 42, and each sum is converted.
There will be 42 conversions of value 64, and 22 conversions of value 0. The average is 42. We have our increase in resolution! This works for input signals of 0, 1, 2… and up to and well beyond 63.
It’s limited only by the input conversion range of the ADC. Notice that some very large input signals, which by themselves are within that conversion range, will, when added to portions of the dither waveform, be moved above that range. In such cases, the averaging process will yield incorrect results. These input values are in the “dither-disadvantaged” range.
For dither to be of value, it must be added to the signal prior to A-to-D conversion; that is, the dither is an analog signal. But analog or digital, a question arises as to its optimal peak-peak range. Should it take on exactly the values discussed above? Or should each of these values be multiplied by some number? An Excel program was written to answer this question by examining sets of signals plus dither of the form of Expression (1):
S + si + dk · Aa (1)
Table 1 describes each variable.
S | Any arbitrary multiple of M = 64 such that Expression (1) is entirely within the ADC conversion range |
si = i, where i = 0, 1, 2… 63 | Where S + si constitute a set of input signals |
dk = k – 31.5, where k = 0, 1, 2… 63 | Where the -31.5 renders dither dk zero-mean, but requires a compensatory value of 31.5 to be added to the average of sets of M ADC conversions |
Aa = a/10, where a = 7, 8, 9… 70 | Where Aa is the peak-peak value of the dither in units of 1 LSB |
Table 1: The variables in Expression (1) that an Excel program was built around to examine sets of signals plus dither.
Expression (1) is evaluated for the full range of si for every given Aa. ADC conversions yielding multiples of 64 are determined for each value of dk.
These conversions are averaged, added to 31.5, and the sum converted to an integer. The number of errors ei,a (0, 1, 2…) in units of 1/64 of an LSB are determined by subtracting this result from S + si.
The errors are then graphed against si for each peak-peak dither amplitude Aa.
This eye chart appears in Figure 1. Confusing, impressive, or both, it’s difficult to get too much useful information out of it. But it’s clear that even though there are errors in most cases, their magnitudes are small compared to the resolution of a single ADC conversion; useful resolution enhancement has been achieved.
Figure 1 An eye chart with the errors of dithered input signals of amplitudes 0 to 63 for and ADC whose LSB is 64.
Additional calculations
To derive more useful information so that the best values of Aa can be identified, some additional calculations are performed. For each Aa, the ei,a are squared, summed over all i, and the square root of the average of the sum is taken to produce the rms error erms. This provides a figure of merit for each scaled peak-peak range Aa of dither. erms is graphed against Aa in Figure 2.
Figure 2 The RMS errors of all input signals with dither added, providing a figure of merit for each scaled peak-peak range Aa of dither.
What is clear from this graph is that zero errors can be obtained if the peak-to-peak dither amplitude is an odd multiple of the ADC conversion LSB. To understand why this happens, consider multiplying dither elements -31.5, -30.5… 31.5 by an odd integer and taking the modulo M = 64 portion of the products.
Surprisingly, you’ll find every number in the basic dither sequence of 0, 1, 2… 63. This gives full coverage to every possible value of input S + si. But why aren’t even multiples error-free?
The modulo 64 of products with even integer multiplicands are even numbers only; the odd elements of the basic sequence are missing. And when Aa is not an integer, the rms errors are generally (although not always) even larger. It could be challenging to generate an analog signal whose range is an exact odd multiple. To minimize the error due to an inexact dither amplitude, we might skip the choice of Aa equal to 1 and choose a multiplier of 3 or 5.
A dither generator
A suitable circuit for generating and using a non-zero mean dither waveform is shown in Figure 3.
Figure 3 A suitable circuit for generating a non-zero mean dither waveform.
At the start of a string of conversions, d2 is set to 0 V to disable M1 while d1 is connected to a reference voltage Vref, such as the one used by the ADC. This allows C1 to begin to charge.
After the last conversion, d1 is left open or grounded, and d2 is set high to enable the MOSFET and quickly discharge the capacitor. Because the peak value of the dither voltage is such a small portion of Vref, what would normally be a signal involving a negative exponent of time is well-approximated as a linear ramp of:
Vref · t / T, where T = R1 · C1
Assuming that the M conversions are equally spaced in time and last for Tsam seconds, T is selected so that the desired Aa is equal to:
Aa = Vref · Tsam / T
The intended signal is obviously not zero-mean. And there is also a small amount of charge injection into C1 when the MOSFET shuts off due to that device’s parasitic capacitances. (A MOSFET with minimal capacitances and a fairly large C1 will work together to limit the size of the charge injection voltage offset.)
Fortunately, even a simple calibration scheme that converts known small and large signals and fashions a best-fit linear correction out of these renders the offsets inconsequential. Note that the dither waveform is subtracted from rather than added to the input signal. This means that the smallest rather than the largest input signals that alone would be within the ADC conversion range are now the ones in the dither-disadvantaged range. If this is of concern, The R resistor connected to ground in Figure 3 can be replaced with a resistor divider presenting the same resistance as R and driven by Vref. A small division ratio is chosen to ensure that all ADC inputs are positive. This returns the dither-disadvantaged range to the larger of all possible ADC conversions.
Errors
The increase in resolution should not be confused with improvements in accuracy; no ADC is ideal. All have integral and differential non-linear errors.
Dither-related ADC improvements
A means has been presented of generating a dither waveform and employing a method using it to enhance the resolution and signal-to-quantization noise of ADC conversions by a factor M, where M is the number of conversions per sample of a DC input signal. A simple calibration technique is required involving the use of ADC conversions of known small and large signals to afford gain and offset error compensation. It should be noted that the application of dither to increase ADC resolution is still, to some extent, at the mercy of the ADC’s accuracy.
Blue sky possibilities
If we wish to consider AC input signals rather than only DC ones, it would be possible to digitally subtract the dither value associated with each conversion from that conversion. Perhaps an averager would still suffice as the filter, perhaps not. Perhaps overall performance improvement would not be as good as with a DC signal, or maybe it would. I’ll do some further analysis, but I also invite comments on the matter.
With AC signals, we don’t have the luxury of waiting for the capacitor in the sawtooth generator to discharge; sampling should be at an uninterrupted, constant rate. Instead of a sawtooth, a triangle wave of the same peak-to-peak amplitude would work.
It could be created with a square wave driving an R1-C1 lowpass filter whose output is capacitively coupled to the unity gain op amp input of Figure 3 in place of the sawtooth generator.
This input would be referenced through a large resistor to ground or to a DAC voltage within the op-amp’s common-mode input range. Dither-disadvantaged ranges might now exist at both extremes of the ADC conversion range. Dealing with such ranges was discussed with sawtooth dither, and the same method can be employed with the triangular waveform. Successive sets of M conversions would occur on rising and on the falling ramps of the triangle wave. The triangular dither waveform would work with DC signals, too, and has the advantage of eliminating MOSFET charge injection.
But with or without a dither waveform, annoying artifacts can arise whenever there is correlation between the periods of the conversion rate and the AC input signal. It is expected that with the dither discussed, artifacts would be M times smaller than without dither.
A known solution to the artifacts problem is to add a small, random analog dither waveform. This will, of course, have a negative impact on signal-to-quantization noise, but the tradeoff may be worth it. I suspect that the magnitude of the new dither should be the size of the ADC’s LSB, but once again, I will investigate, and I do invite comments.
Acknowledgements
I’d like to acknowledge significant contributions to the development and readability of this DI by someone who wishes to remain anonymous.
Christopher Paul has worked in various engineering positions in the communications industry for over 40 years.
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