The relentless pursuit of performance in sectors such as AI, cloud computing, and autonomous driving is creating a heat crisis. As the next generation of processors demand more power in smaller spaces, the switched-mode power supply (SMPS) is being pushed to its thermal limit. SMPS’s integrated circuit (IC) packages have traditionally used a large thermal pad on the bottom side of the package, known as a die attach paddle (DAP), to dissipate the majority of the heat through the printed circuit board (PCB). But as power density increases, relying on only one side of the package to dissipate heat quickly becomes a serious constraint.

A thermally enhanced package is a type of IC package designed to dissipate heat from both the top and bottom surfaces. In this article, we’ll explore the standard thermal metrics of IC packages, along with the composition, top-side cooling methods, and thermal benefits of a thermally enhanced package.

Thermal metrics of IC packages

In order to understand what a thermally-enhanced package is and why it is beneficial, it’s important to first understand the terminology for describing the thermal performance of an IC package. Three foundational metrics of thermal resistance are the junction-to-ambient thermal resistance (R_θJA), the junction-to-case (top) thermal resistance (R_θJC(top)), and the junction-to-board thermal resistance (R_θJB).

Thermal resistance measures the opposition to the flow of heat in a medium. In IC packages, thermal resistance is usually measured in Celsius rise per watt dissipated (°C/W), or how much the temperature rises when the IC dissipates a certain amount of power.

R_θJA measures the thermal resistance between the junction (J) (the silicon die itself), and the ambient air (A) around the IC. R_θJC(top) measures the thermal resistance specifically between (J) and the top (t) of the case (C) or package mold. R_θJB measures the thermal resistance specifically between (J) and the PCB on which the package is mounted.

R_θJA significantly depends on its subcomponents—both R_θJC(top) and R_θJB. The lower the R_θJA, the better, because it clearly indicates that there will be a lower temperature rise per unit of power dissipated. Power IC designers spend a lot of time and resources to come up with new ways to lower R_θJA. A thermally enhanced package is one such way.

Thermally enhanced package composition

A thermally enhanced package is a quad flat no-lead (QFN) package that has both a bottom-side DAP and a top-side cutout of the molding to directly expose the back of the silicon die to the environment. Figure 1 shows the gray backside of the die for the Texas Instruments (TI) LM61495T-Q1 buck converter.

Figure 1 The LM61495T-Q1 buck converter in a thermally enhanced package. Source: Texas Instruments

Exposing the die on the top side of the package does two things: it lowers the R_θJC(top) compared to an IC package that completely molds over the die, and enables a direct connection between the die and an external heat sink, which can significantly reduce R_θJA.

R_θJC(top) in a thermally enhanced package

R_θJC(top) allows heat to escape more effectively from the top of the device. Typically, heat escapes through the package mold and then to the air, but in a thermally enhanced package, it escapes directly to the air. This helps reduce the device temperature and reduces the risk of thermal shutdown and long-term heat stress issues. The thermally enhanced package also has a lower R_θJA, which makes it possible for a converter to handle more current and operate in hotter environments.

Figure 2 shows a series of IC junction temperature measurements taken across output current for both the LM61495T-Q1 in the thermally enhanced package and TI’s LM61495-Q1 buck converter in the standard QFN package under two common operating conditions.

Figure 2 Output current vs. junction temperature for the LM61495-Q1 and LM61495T-Q1 with no heat sink. Source: Texas Instruments

Clearly, even with no heat sink attached, the thermally enhanced package runs slightly cooler, simply because more heat is dissipating out of the top of the package and into the air. The R_θJA for a thermally enhanced package is slightly lower, demonstrating with certainty that, even if only marginally, this package type will provide better thermals compared to the standard QFN with top-side molding, even without any additional thermal management techniques. Table 1 lists the official thermal metrics found in both devices’ data sheets.

Table 1 Comparing data sheet-derived thermal metrics for the LM61495-Q1 and LM61495T-Q1. Source: Texas Instruments

Top-side cooling vs QFN

Combining its near-zero R_θJC(Top) top side with an effective heat sink significantly reduces the R_θJA of an IC in a thermally enhanced package. There are three significant improvements when compared to the same IC in a standard QFN package under otherwise similar operating conditions:

• Higher switching-frequency operation.
• Higher output-current capability.
• Operation at higher ambient temperatures.

For any SMPS under a given input voltage (V_IN), output voltage (V_OUT) condition and supplying a given output current, the maximum switching frequency will be thermally limited. Within every switching period, there are switching losses and conduction losses that dissipate as heat. Switching more frequently dissipates more power in the IC, leading to an increased IC junction temperature. This can be frustrating for engineers because switching at higher frequencies enables the use of a smaller buck inductor, and therefore a smaller overall solution size and lower cost.

Under the same operating conditions, using the thermally enhanced package and a heat sink, the heat dissipated in each switching period is now more easily channeled out of the IC, leading to a lower junction temperature and enabling a higher switching frequency without hitting the IC’s junction temperature limit. Just don’t exceed the maximum switching frequency recommendation of the device as outlined in the data sheet.

The benefits of using a smaller inductor are especially pronounced in higher-current multiphase designs that require an inductor for every phase. Figure 3 shows a simplified four-phase design capable of supplying 24 A at 3.3 V_OUT at 2.2 MHz using the TI LM64AA2-Q1 step-down converter. If the design were to overheat and the switching frequency had to be reduced to 400 kHz, you would have to replace all four inductors with larger inductors (in terms of both inductance and size), inflating the overall solution cost and size substantially.

Figure 3 Simplified schematic of a single-output, four-phase step-down converter design using the LM644A2-Q1 step-down converter in the thermally enhanced package. Source: Texas Instruments

Conversely, for any SMPS under a given V_IN, V_OUT condition, and operating at a specific switching frequency, the maximum output current will be thermally limited. When discussing the current limit of an IC, it’s important to clarify that for all high-side FET integrated SMPSs, there is a data sheet-specified high-side current limit that bounds the possible output current.

Upon reaching the current-limit setpoint, the high-side FET turns off, and the IC may enter a hiccup interval to reduce the operating temperature until the overcurrent condition goes away. But even before reaching the current limit, it is very possible for an IC to overheat from a high output-current requirement. This is especially true, again, at higher frequencies. As long as you don’t exceed the high-side current limit, using an IC in the thermally enhanced package with a heat sink can extend the maximum possible output current to a level at which the standard QFN IC alone would overheat.

There is another constant to make the thermally enhanced package versus the standard QFN package comparison valid, and that is the ambient temperature (T_A). T_A is a significant factor when considering how much power an SMPS can deliver before it starts to overheat.

For example, a buck converter may be able to easily do a 12V_IN-to-5V_OUT conversion and support a continuous 6 A of current while switching at 2.2 MHz when the T_A is 25°C, but not at 105°C. So, there is yet a third way to look at the benefit that a thermally enhanced package can provide. Assuming the V_IN, V_OUT, output current, and maximum switching frequency are constant, a thermally enhanced package used with a heat sink can enable an SMPS to operate at a meaningfully higher T_A compared to a standard QFN package with no heat sink.

Figure 4 uses a current derating curve to demonstrate both the higher output current capability and operation at a higher T_A. In an experiment using the LM61495-Q1 and LM61495T-Q1 buck converters, we measured the output current against the T_A in a standard QFN package without a heat sink and in a thermally enhanced package QFN connected to an off-the-shelf 45 x 45 x 15 mm stand-alone fin-type heat sink. Other than the package and the heat sink, all other conditions are constant: operating conditions, PCB, and measurement instrumentation.

Figure 4 Output current vs. ambient temperature of the LM61495-Q1 with no heat sink and the LM61495T-Q1 with an off-the-shelf 45 x 45 x 15 mm stand-alone fin-type heat sink. Source: Texas Instruments

When T_A reaches about 83˚C, the standard QFN package hits its thermal shutdown threshold, and the output current begins to collapse. As T_A increases further, the device cycles into and out of thermal shutdown, and the maximum achievable output current that the device can deliver is necessarily reduced until T_A reaches a steady 125˚C. At this point, the converter may not be able to sustain even 5 A without overheating.

Compare this to the thermally enhanced package QFN connected to a heat sink. The first instance of thermal shutdown now doesn’t occur until about 117˚C. That’s an increase in T_A before hitting a thermal shutdown of 34˚C, or 40%. The LM61495-Q1 is a 10-A buck converter, meaning that its recommended maximum output current is 10 A. But in this case, with a thermally enhanced package and effective heat sinking, a continuous 11 A output was clearly achievable up to 117˚C – in other words, a 10% increase in maximum continuous output current even at a high T_A.

Methods of top-side cooling

Figure 5, Figure 6, and Figure 7 show some of the most common methods of top-side cooling. Stand-alone heat sinks are simple and readily available in many different forms, materials, and sizes, but are sometimes impractical in small-form-factor designs.

Figure 5 Stand-alone fin-type heat sink, these are simple and readily available but sometimes impractical in small form factor designs. Source: Texas Instruments

Cold plates are very effective in dissipating heat but are more complex and costlier to implement (Figure 6).

Figure 6 Cold plate-type heat sink, these are very effective in dissipating heat but are more complex and costlier to implement. Source: Texas Instruments

Using the metal housing containing the power supply and the surrounding electronics as a heat sink is compact, effective, and relatively inexpensive if the housing already exists. As shown in Figure 7, this is done by creating a pillar or dimple that connects the IC to the housing to enable efficient heat transfer. For power supplies powering processors, it’s likely that this method is already helping dissipate heat on the processor. Adding an additional dimple or pillar that now gives heat-sink access to the power supply is often a simple change, making it a very popular method, especially for processor power.

Figure 7 Contact-with-housing heat sink where a pillar or dimple connects the IC to the housing to enable efficient heat transfer. Source: Texas Instruments

There are many ways to implement heat sinking, but that doesn’t mean that they are all equally effective. The size, material, and form of the heat sink matter. The type and amount of thermal interface material used between the IC and the heat sink matter, as does its placement. It is important to optimize all of these factors for the design at hand.

Comparing heat sinks

Figure 8 shows another current derating curve. It compares two different types of heat sinks, each mounted on the LM61495T-Q1. For reference, the figure includes the performance of the standard QFN package with no heat sink.

Figure 8 Output current versus the ambient temperature of the LM61495-Q1 with no heat sink, the LM61495T-Q1 with an off-the-shelf 45 x 45 x 15 mm stand-alone fin-type heat sink, and with an aluminum plate heat sink. Source: Texas Instruments

For a visualization of these heat sinks, see Figure 9 and Figure 10, which show a top-down view of the PCB and a clear view of how the heat sinks are mounted to the IC and PCB. The heat sink shown in Figure 9 is a commercially available, off-the-shelf product. To reiterate, it is a 45 mm by 45 mm aluminum alloy heat sink with a base that is 3mm thick and pin-type fins that extend the surface area and allow omnidirectional airflow.

Figure 9 The LM61495T-Q1 evaluation board with the off-the-shelf 45 x 45 x 15 mm stand-alone fin-type heat sink. Source: Texas Instruments

Figure 10 shows a custom heat sink that is essentially just a 50 mm by 50 mm aluminum plate with a 2 mm thickness and a small pillar that directly touches the IC. This heat sink was designed to mimic the contact-with-housing method, as it is very similar in size and material to the types of housing seen in real applications.

Figure 10 The LM61495T-Q1 evaluation board with a custom aluminum plate heat sink to mimic the contact-with-housing method. Source: Texas Instruments

Under the same conditions, the stand-alone heat sink provides a major benefit compared to the standard QFN package with no heat sink. The standard QFN package hits thermal shutdown around 67°C T_A. For the stand-alone heat-sink setup, thermal shutdown isn’t triggered until the T_A reaches about 111°C, which is a major improvement. However, the aluminum plate heat-sink setup doesn’t hit thermal shutdown at all. With the aluminum plate setup, the converter is still able to supply a continuous 10-A current at the highest T_A tested (125˚C), demonstrating both the importance of choosing the correct heat sink for the system requirements as well as the popularity of the contact-with-housing method.

Addressing modern thermal challenges

Power supply designers increasingly deal with thermal challenges as modern applications demand more power and smaller form factors in hotter spaces. Standard QFN packaging has long relied on dissipating the majority of generated heat through the bottom side of the package to the PCB. A thermally enhanced package QFN uses both the top and bottom sides of the package to improve heat flow out of the IC, essentially paralleling the thermal impedance paths and reducing the effective thermal impedance.

Combining a thermally enhanced package with effective heat sinking results in significant thermal benefits and enables higher-power-density designs. Because these benefits are derived from reducing the effective R_θJA, designers can realize just one or all of these benefits in varying degrees. Increase the maximum switching frequency and reduce solution size and cost. Enabling a higher maximum output current for higher power conversion. Enable operation at a higher T_A.

Jonathan Riley is a Senior Product Marketing Engineer for Texas Instruments’ Switching Regulators organization. He holds a BS in Electrical Engineering from the University of California Santa Cruz. At TI, Jonathan works in the crossroads of marketing and engineering to ensure TI’s Switching Regulator product line continues to evolve ahead of the market and enable customers to power the technologies of tomorrow.

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• QFN? QFP? QFWHAT?

Additional resources

• Read the TI application note, “Semiconductor and IC Package Thermal Metrics.”
• Check out these TI application reports:
  • “AN-2020 Thermal Design by Insight, Not Hindsight.”
  • “AN-1520 A Guide to Board Layout for Best Thermal Resistance for Exposed Packages.”
• See the TI application brief, “PowerPAD Made Easy.”
• Watch the TI video resource, “Improve thermal performance using thermally enhanced packaging (TEP).”

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