As the industry accelerates toward 800G Ethernet and optical interconnects, engineers face new challenges in managing electromagnetic interference (EMI) while ensuring signal integrity at unprecedented speeds. The transition to 112G pulse amplitude modulation 4-level (PAM4) SerDes introduces faster edge rates and dense spectral content, elevating the risk of radiated and conducted emissions.
Simultaneously, compact module form factors such as QSFP-DD and OSFP force high-speed lanes, DC-DC converters, and control circuitry into tight spaces, increasing the potential for crosstalk and noise coupling. Power delivery noise, insufficient shielding, and poor return path design can easily transform an 800G design from lab success to compliance failure during emissions testing.
To avoid late-stage surprises, it’s critical to address EMI systematically from the PCB level up, balancing stack-up, routing, and grounding decisions with high-speed signal integrity and practical manufacturability.
This article provides engineers with actionable PCB design strategies to reduce EMI in 800G systems while maintaining high performance in data center and telecom environments.
Layout considerations
For chip-to-chip 112G PAM4 signaling, the key frequency is the Nyquist frequency, which is half of the baud rate. PAM4 encodes 2 bits per symbol.
- Therefore, the baud rate (symbol rate) is half of the bit rate. For 112 Gbps, the baud rate is 112 Gbps / 2 = 56 Gbaud (gigabaud).
- The Nyquist frequency is half of the baud rate. So, the Nyquist frequency for 112G PAM4 is 56 Gbaud / 2 = 28 GHz.
The maximum insertion at 29 GHz for 112G medium range PAM4 is 20 dB. Megtron 7 offers a low dissipation factor (Df) of 0.003 at 29 GHz, which is adequate for 112G. Df of 0.003 is squarely in the “very low loss” category. It means that the material will dissipate a minimal amount of the signal’s energy, allowing more of the original signal strength to reach the receiver.
This helps preserve the critical amplitude differences between the PAM4 levels, enabling a lower bit error rate (BER). Low-cost FR-4 material typically has Df value of 0.015, which is excessive for 112G PAM4.
Aperture and shielding effectiveness
To avoid EMI, the wavelength relationship is essential, especially when considering wires or openings that may serve as unintentional antennas. An EMI shield’s seam, slot, or hole can all function as a slot antenna. When this opening’s dimensions get close to a sizable portion of an interfering signal’s wavelength, it turns into an effective radiator, letting EMI escape, perhaps failing the radiated emission test in an anechoic chamber.
As a general guideline, the maximum size of any aperture should be less than λ/20 (one-twentieth of the wavelength) of the highest frequency of concern to achieve efficient EMI shielding. See Figure 1 for typical airflow management openings.
Figure 1 Airflow apertures and shielded ventilation are shown for airflow management. Source: Author
The wavelength is calculated as lambda = c / f = (3 * 108) / (28 * 109) = 10.7 mm
Opening dimension = lambda / 20 = 0.536 mm
To reduce EMI problems, all apertures for equipment that operate at or are vulnerable to 28-GHz signals should ideally be less than 0.536 mm. The permitted dimensions for apertures decrease with increasing frequencies.
Routing guidelines and via stub impact at 112G PAM4
The spacing rule between two differential pairs is different for TX-to-TX and TX-to-RX. Generally, the allowed serpentine routing length for 112G PAM4 is less than previous speeds. Serpentine lines have less impact on a differential pair that is weakly connected.
A via stub is the unused portion of a through-hole via that extends beyond the layer where the signal transitions (Figure 2). For example, if a signal goes from the top layer to an inner layer via a through-hole, the part of the via extending from that inner layer to the bottom of the board forms a stub.
Figure 2 The diagram provides an overview of PCB via stub. Source: Author
f = c/(4*L*√ℇeff)
f = resonant frequency of a via stub = 28 GHz
c = speed of light = 3 x 108 m/s
L = Length of via stub = 1.533 mm = 60.35 mils
ℇeff = 3.05 at 28GHz
A via stub length of ~60 mils will resonate near 28 GHz in Megtron 7. For 112G PAM4 designs, this length is too long and can cause serious signal integrity issues.
Power considerations
Generally, 800G transceivers consume between 13 W and 18 W per port for short range but exact value is mentioned in module manufacturer datasheet. These transceivers contain 8 lanes for 112G to transmit 800G. A 1RU appliance with 32 QSFP-DD would need 25.6T switch. See Figure 3 for a simplified diagram of 1RU appliance with one ASIC.
Figure 3 Airflow management is shown for 1U high-speed systems incorporating a single ASIC. Source: Author
- Power consumption for 112G PAM4 SerDes is high (typically 0.5–1.0 W per lane). For example, SerDes system will consume worst-case scenario Power = 8 * 1 W = 8 W.
- Tcase_max = 90°C, Tambient_max = 50°C. Rth = (90 – 50) / 8 = 5° C/W. System designers should ensure heatsink and thermal interface material provides ≤ 5 ° C/W.
- Q = Power to be dissipated (watts). ΔT = Allowable air temperature rise across the system (°C). Conversation factor = 3.16
- CFM = Q* 3.16/ΔT = 2000 * 3.16/15 = 421
- In 1RU, engineers use multiple 40 x 40 x 56 mm high-RPM fans for airfield distribution that typically pushes ~25-30 CFM. Fans required = 421/25 = 16.8 ≈ 17 fans. Accommodating this high number of fans is difficult because external power supplies occupy rear space.
Design recommendations
As 800G hardware and 112G PAM4 SerDes become standard in next-generation data center and telecom systems, engineers face a multifaceted design challenge: maintaining signal integrity, controlling EMI, and managing thermal constraints within high-density 1RU systems.
Careful PCB material selection, such as low-loss Megtron 7, precise routing to minimize via stub resonance, and disciplined aperture management for shielding are essential to avoid signal degradation and EMI test failures. Simultaneously, the high-power density of 800G optics and SerDes require advanced thermal design, airflow planning, and redundancy considerations to meet operational and reliability targets.
By systematically addressing EMI and thermal factors early in the design cycle, engineers can confidently build 800G systems that pass compliance testing while delivering high performance under real-world conditions. Doing so not only avoids costly late-stage redesigns but also ensures robust deployment of high-speed systems critical for the evolving demands of cloud and AI workloads.
Ujjwal Sharma is a hardware engineer specializing in high-speed system design, signal/power integrity, and optical modules for data center hardware.
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