There’s been interest recently here in the land of Design Ideas (DIs) in a family of simple interface circuits for pulse width modulation (PWM) control of generic voltage regulators (both linear and switching). Members of the family rely on the regulator’s internal voltage reference and a discrete FET connected in series with the regulator’s programming voltage divider.
PWM uses the FET as a switch to modulate the bottom resistor (R1) of the divider, so that the 0 to 100% PWM duty factor (DF) varies the time-averaged effective conductance of R1 from 0 to 100% of its nominal value. This variation programs the regulator output from Vo = Vs (its feedback pin reference voltage) at DF = 0 to Vo = Vs(R2/R1 + 1) at DF = 100%.
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Some of these circuits establish a linear functionality between DF and Vo. Figure 1 is an example of that genre as described in “PWM buck regulator interface generalized design equations.”
Figure 1 PWM programs Vo linearly where Vo = Vs(R2/(R1/DF) + 1).
For others, like Figure 2’s concept designed by frequent contributor Christopher Paul and explained in “Improve PWM controller-induced ripple in voltage regulators”…it’s nonlinear…
Figure 2 PWM programs Vo nonlinearly where Vo = Vs(R2/(R1a/DF + R1b + R1c) + 1).
Note that for clarity, Figure 2 does not include many exciting details of Paul’s innovative design. See his article at the link for the whole story.
The nonlinearity problem
However, to explore the implications of Figure 2’s nonlinearity a bit further, in the example of the circuit provided in Paul’ DI:
R1a = 2490 Ω
R1b = 2490 Ω
R1c = 4990 Ω
Vs = 0.800 V
R2 = 53600 Ω
Which, if we assume 8-bit PWM resolution, provides the response curves shown in Figure 3.
Figure 3 The 8-bit PWM setting versus DF = X/255. The left axis (blue curve) is Vo = 0.8(53600/(2490/(X/255) + 7480) + 1). The right axis (red curve) is Vo volts increment per PWM least significant bit (LSBit) increment.
Paul says of this nonlinear response: “Although the output voltage is no longer a linear function of the PWM duty cycle, a simple software-based lookup table renders this a mere inconvenience. (Yup, ‘we can fix it in software!’)”Of course, he’s absolutely right: For any chosen Vo, a corresponding DF can be easily calculated and stored in a small (256-entry) lookup table.
However, translating from the computed DF to an integer 8-bit PWM code is a different matter. Figure 3’s increment-vs-increment red curve provides an important caveat to Paul’s otherwise accurate statement.
If the conversion from 8-bit 0 to 255 code to the 0.8 V to 5.1 V, or 4.3V Vo span, were linear, then each LSBit increment would bump Vo by a constant 15.8 mV (= 4.3 V/256). But it isn’t.
And, as Figure 3’s red curve shows, due to the strong nonlinearity of the conversion, the 8-bit resolution criterion is exceeded for all PWM codes < 75 and Vo < 3.77 V = 74% of full scale.
And it gets worse: For Vo values down near Vs = 0.8 V, the LSBit increment soars to 67 mV (= 4.3 V/64). This, therefore, equates to a resolution of not 8 bits, but barely 6.
The fix
Unfortunately, there’s very little any software fix can do about that. Which might make nonlinearity for some applications perhaps more than just an “inconvenience?” So what could fix it?
The nonlinearity basically arises from the fact that only a fraction (R1a) of the total R1abc resistance is modulated by PWM, as the PWM DF changes, that fraction changes, which in turn changes the rate of change of Vo versus DF. In fact, it changes this by quite a lot.
Getting to specifics, in the example of Paul’s circuit provided in his DI, we see they make the modulated resistance R1a only 25% of the total R1 resistance at DF = 100%, with this proportion increasing to 100% as DF goes to 0%. This is obviously a big change concentrated toward lower DF.
A clue to a possible (at least partial) fix is found back in the observation that the nonlinearity and resolution loss originally arose from the fact that only a small fraction (25% R1a) of the total R1abc resistance is modulated by PWM. So, perhaps a bigger R1a fraction of R1abc could recover some of the lost resolution.
As an experiment, I changed Paul’s R1 resistor values to the following.
R1a = 7960 Ω
R1b = 1000 Ω
R1c = 1000 Ω
This makes R1a now 80% of R1abc instead of only 25%. Figure 4 illustrates the effect on the response curves. 
Figure 4 The impact of making R1a 80% of R1abc. The left axis (blue curve) is Vo = 0.8(53600/(7960/(X/255) + 2000) + 1). The right axis (red curve) is Vo volts increment per PWM LSBit increment.
Figure 4’s blue Vo versus PWM curve is obviously still nonlinear, but significantly less so. But perhaps the more important improvement is to the red curve: Unlike the previous erosion of resolution at the left end of the curve to 67 mV per PWM LSBit to just 6 bits, Figure 3 maxes out at 21 mV, or 7.7 bits.
Is this a “fix?” Well, obviously, 7.7 bits is better than 6 bits, but it’s still not 8 bits, so resolution recovery isn’t perfect. Also, my arbitrary shuffling of R1 ratios is almost certain to adversely impact the spectacular ripple attenuation cited in Christopher Paul’s original article. Mid-frequency loop gain may also suffer from the heavier loading on C2 and R2 imposed by the reduced R1c value. This could lead to a possible deterioration of the transient response and noise rejection. Perhaps C2 could be increased to moderate that effect.
Still, it would be fair to call it a start at a fix for nonlinearity that lay beyond the reach of software.
Stephen Woodward’s relationship with EDN’s DI column goes back quite a long way. Over 100 submissions have been accepted since his first contribution back in 1974.
Related Content
- Improve PWM controller-induced ripple in voltage regulators
- PWM buck regulator interface generalized design equations
- A nice, simple, and reasonably accurate PWM-driven 16-bit DAC
- Brute force mitigation of PWM Vdd and ground “saturation” errors
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