A temperature-compensated, calibration-free anti-log amplifier

A temperature-compensated, calibration-free anti-log amplifier



The typical anti-log circuit

The basic anti-log amplifier looks like the familiar circuit of Figure 1.

Figure 1 The typical anti-log circuit has uncertainties related to the reverse current, Is, and is sensitive to temperature.

Wow the engineering world with your unique design: Design Ideas Submission Guide

The approximate equation for V0 given in Figure 1 comes from the Ebers-Moll model. A more advanced model employed by many modern spice simulators, such as LTspice, is the Gummel-Poon model, which I won’t discuss here. It suffices for discussions in this Design Idea (DI) to work with Ebers-Moll and to let simulations benefit from the Gummel-Poon model.

The simple Figure 1 circuit is sensitive to both temperature and the value of Is. Unfortunately, the value and limits of Is are not specified in datasheets. Interestingly, spice models employ specific parametric values for each transistor, but still say nothing about the limits of these values. Transistors taken from different sections of the same silicon wafer can have different parametric values. The differences between different wafers from the same facility can be greater yet and can be even more noticeable when those from different facilities of the same manufacturer are considered. Factor in the products of the same part number from different manufacturers, and clear, plausible concerns about design repeatability are evident.

Addressing temperature and Is variations

There’s a need for a circuit that addresses these two banes of consistent performance. Fortunately, the circuit of Figure 2 is a known solution to the problem [1].

Figure 2 This circuit addresses variations in both temperature and Is. Key to its successful operation is that Q1a and Q1b constitute a matched pair, taken from adjacent locations on the same silicon wafer. Operating with the same VCEs is also beneficial for matching.

It works as follows. Given that Q1a and Q1b are taken from adjacent locations on the same silicon wafer, their characteristics (and specifically Is) are approximately identical (again, Is isn’t spec’d). And so, we can write that:

It’s also clear that:

Additionally,

So:

Therefore:      

Substituting Ic expressions for the two VBEs,

And here’s some of the circuit’s “magic”: whatever their value, the matched Is’s cancel! From the properties of logarithms,

Again, from the properties of logarithms:     

Exponentiating, substituting for the Ic’s, and solving for V0:

Note that Vi must be negative for proper operation.

Improving temperature compensation

Let’s now turn our attention to using a thermistor to deal with temperature compensation. Those I’m used to dealing with are negative temperature coefficient (NTC) devices. But they’ll do a poor job of canceling the “T” in the denominator of Equation (1). Was there an error in Reference [1]?

I exchanged the positions of R3 and the (NTC) thermistor in the circuit of Figure 2 and added a few resistors in various series and parallel combinations. Trying some resistor values, this met with some success. But the results were far better with the circuit as shown when a positive temperature coefficient (PTC) was used.

I settled on the readily available and inexpensive Vishay TFPT1206L1002FM. These are almost perfectly linear devices, especially in comparison to the highly non-linear NTCs. Figure 3 shows the differences between two such devices with resistances of 10 kΩ at 25°C. It makes sense that a properly situated nearly linear device would do a better job of canceling the linear temperature variation.

Figure 3 A comparison of a highly non-linear NTC and a nearly linear PTC.

To see if it would improve the overall temperature compensation in the Figure 2 circuit, I considered adding a fixed resistor in series with the TFPT1206L1002FM and another in parallel with that series combination.

Thinking intuitively that this three-component combination might work better in the feedback path of an inverting op amp whose input was another fixed resistor, I considered both the original non-inverting and this new inverting configurations. The question became how to find the fixed resistor values.

The argument of the exponent in Equation (1) (exclusive of Vi) provides the transfer function H(T, <resistors, PTC>), which would be ideally invariant with temperature T (with Th1 suitably modified to accommodate the series and parallel resistors).

For any given set of resistor values, the configurations apply some approximate, average attenuation α to the input voltage Vi. We need to find the values of the resistors and of α such that for each temperature Tk over a selected temperature range (I chose to work with the integer temperatures from -40°C to +85°C inclusive and used the PTC’s associated values), the following expression is minimized:

Excel’s Solver was the perfect tool for this job. (Drop me a note in this DI’s comments section if you’re interested in the details.)

The winning result

The configurations were found to work equally well (with different value components.) I chose the inverter because it allows Vi to be a positive voltage. Figure 4 shows the winning result. The average value α was determined to be 1.1996.

Figure 4 The simulated circuit with R2a, R2b, and R3 chosen with the help of Excel’s Solver. A specific matched pair of transistors has been selected, along with values for resistors R1 and Rref, and a voltage source Vref.

For Figure 4, Equation (1) now becomes approximately:

The circuit in Figure 4 was simulated with 10° temperature steps from -40°C to +80°C and values for Vi of 100 µV, 1 mV, 10 mV, 100 mV, 1 V, and 6 V. These V0 values were divided by those given by Equation (2), which are the expected results for this circuit.

Over the industrial range of operating temperatures and more than four orders of magnitude of input voltages, Figure 5 shows a worst-case error of -4.5% / +1.0%.

Figure 5 Over the industrial range of operating temperatures and over 4.5 orders of magnitude of input voltages from 100 µV to 6 V, the Figure 4 circuit shows a worst-case error of better than  -5.0% / + 1.0%. V0 ranges from 2.5 mV to 3 V.

Bonus

With a minor addition, this circuit can also support a current source output. Simply split Figure 4’s R1 into two resistors in series and add the circuit of Figure 6.

Figure 6 Split R1 of Figure 4 into R1a and R1b; also add U4, Rsense, and a 2N5089 transistor to produce a current source output.

Caveats

 With all of this, the simulation does not account for variations between the IS’s of a matched pair’s transistors; I’m unaware of a source for any such information. I’ve not specified op-amps for this circuit, but they will require positive and negative supplies and should be able to swing at least 1-V negative with respect to and have a common-mode input range that includes ground. Bias currents should not exceed 10 nA, and sub-1 mV offset voltages are recommended.

Temperature compensation for anti-log amp

Excel’s Solver has been used to design a temperature-compensation network for an anti-log amplifier around a nearly linear PTC thermistor. The circuit exhibits good temperature compensation over the industrial range. It operates within a signal range of more than three orders of magnitude. Voltage and current outputs are available.

References

  1. Jain, M. K. (n.d.). Antilog amplifiers.

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